Lablog on CuriousCoding

Route Planning using Customizable Contraction Hierarchies

Mon, 02 Mar 2026 00:00:00 +0100

Table of Contents

1 Problem Statement: Customizable Route Planning (CRP)
2 Contraction Hierarchies (CH)
- 2.1 Classic Contraction Hierarchies
- 2.2 Customizable Contraction Hierarchies (CCH)
3 Analogy with trees
4 Shortest Paths in CHs
5 Parents: Faster Shortest Paths in CCHs
6 Input Graph
7 Initial Algorithm
- 7.1 Permute input
- 7.2 Chordal Completion and Parents
- 7.3 Customize
- 7.4 Query
8 Optimizing things
- 8.1 Binary searching in find_edge
- 8.2 HashMap of edges
- 8.3 Ranges of neighbours
- 8.4 Linear scan
- 8.5 Proper query algorithm
- 8.6 Pruning edges
- 8.7 Pruning
- 8.8 Unconditional edge relaxing
- 8.9 Early edge break
- 8.10 DFS-ordering the nodes
- 8.11 Not inclining queries
9 Some stats
10 Serializing the final structure
11 Merging adjacent edges
- 11.1 Perf stat
- 11.2 All ranges are multiples of 8
- 11.3 All ranges have size 8
- 11.4 Finding the bottleneck
12 Bugfixing
13 Further ideas
- 13.1 Failed: Doubling the graph
- 13.2 Edge pruning
- 13.3 Failed: Expanding a node and its parent in parallel
14 Current best results
- 14.1 Bottleneck
15 TODO

These are some notes on customizable contraction hierarchies, based on talks with Michael Zündorf and the survey paper by Bläsius, Buchhold, Wagner, Zeitz, and Zündorf (2025).

Trying to understand DDR memory

Tue, 20 Jan 2026 00:00:00 +0100

Table of Contents

1 Questions
2 A load of articles/blogs/pages to read
- 2.1 Wikipedia articles
- 2.2 More posts
- 2.3 Notes
- 2.4 My own RAM
- 2.5 Continued notes
- 2.6 Address mapping notation
- 2.7 Intel spec
- 2.8 Rank interleaving
- 2.9 Nontemporal reads/writes
3 reMap: using Performance counters
4 Sudoku
- 4.1 Step 1: DRAM addressing functions
- 4.2 Step 2: row/column bits
- 4.3 Step 3: validation
- 4.4 Step 4: which function is what?
- 4.5 Refreshes
- 4.6 Consecutive Accesses
5 Sudoku, now with only 1 DIMM
- 5.1 setup
- 5.2 1. reverse functions
- 5.3 2. identify bits
- 5.4 3. validate mapping
- 5.5 4. decompose functions
6 Final results
7 decode-dimms
- 7.1 Bank groups
- 7.2 Refresh
- 7.3 Random access throughput
8 CPU benchmarks
- 8.1 cpu-benchmarks
  - 8.1.1 random access throughput 1 DIMM
  - 8.1.2 random access throughput 2 DIMM
- 8.2 memory-read-experiment
  - 8.2.1 strided reading 1 DIMM
  - 8.2.2 strided reading 2 DIMM
9 tinymembench
10 Remaining questions

These are chronological (and thus, only lightly organized) notes on my attempt to understand how DDR4 and DDR5 RAM memory work.

Mod-minimizers and other minimizers

Thu, 18 Jan 2024 00:00:00 +0100

\[ \newcommand{\d}{\mathrm{d}} \newcommand{\L}{\mathcal{L}} \]

This post introduces some background for minimizers and some experiments for a new minimizer variant. That new variant is now called the mod-minimizer and published at WABI24 (DOI, PDF) (Groot Koerkamp and Pibiri 2024). The paper also includes a review of existing methods, including pseudocode for most of the methods covered below.

One Billion Row Challenge

Wed, 03 Jan 2024 00:00:00 +0100

Table of Contents

External links
The problem
Initial solution: 105s
First flamegraph
Bytes instead of strings: 72s
Manual parsing: 61s
Inline hash keys: 50s
Faster hash function: 41s
A new flame graph
Perf it is
Something simple: allocating the right size: 41s
memchr for scanning: 47s
memchr crate: 29s
get_unchecked: 28s
Manual SIMD: 29s
Profiling
Revisiting the key function: 23s
PtrHash perfect hash function: 17s
Larger masks: 15s
Reduce pattern matching: 14s
Memory map: 12s
Parallelization: 2.0s
Branchless parsing: 1.7s
Purging all branches: 1.67s
Some more attempts
Faster perfect hashing: 1.55s
Bug time: Back up to 1.71s
Temperatures less than 100: 1.62s
Computing min as a max: 1.50
Intermezzo: Hyperthreading: 1.34s
Not parsing negative numbers: 1.48s
More efficient parsing: 1.44s
Fixing undefined behaviour: back to 1.56s
Lazily subtracting b'0': 1.52s
Min/max without parsing: 1.55s
Parsing using a single multiplication: doesn’t work
Parsing using a single multiplication does work after all! 1.48s
A side note: ASCII
Skip parsing using PDEP: 1.42s
- Improved
- A further note
Branchy min/max: 1.37s
No counting: 1.34s
Arbitrary long city names: 1.34
4 entries in parallel: 1.23s
Mmap per thread
Reordering some operations: 1.19s
Reordering more: 1.11s
Even more ILP: 1.05
Compliance 1, OK I’ll count: 1.06
TODO
Postscript

A youtube video on this post is here.

Notes on implementing Longest Common Repeat (LCR)

Wed, 06 Dec 2023 00:00:00 +0100

Table of Contents

Notes
Discussion / TODOs
- Evals

These are my running notes on implementing an algorithm for Longest Common Repeat using minimizers.

Notes Link to heading

Coloured Tree Problem Link to heading

See Lemma 3 at here

Generic sparse suffix array Link to heading

For random strings and $b \leq n / \log n$, direct radix sort on $2log n + log log n$-bit prefixes is sufficient for $O(n)$ runtime. In fact, since computer word size $w\geq \log n$, we only need at most $2$ rounds of radix sort! (See simple-saca.)

PtrHash: Notes on adapting PTHash in Rust

Thu, 21 Sep 2023 00:00:00 +0200

Table of Contents

Questions and remarks on PTHash paper
Ideas for improvement
Implementation log
PtrHash, part 2
- Phobic
  - TODO for PtrHash

\[ %\newcommand{\mm}{\,\%\,} \newcommand{\mm}{\bmod} \newcommand{\lxor}{\oplus} \newcommand{\K}{\mathcal K} \]